31. When both inputs of a J-K flip-flop cycle, the output will:
(a) be invalid
(b) not change
(c) change
(d) toggle
32. A basic S-R flip-flop can be constructed by cross-coupling which basic logic gates?
(a) AND or OR gates
(b) XOR or XNOR gates
(c) NOR or NAND gates
(d) AND or NOR gates
33. Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature?
(a) asynchronous operation
(b) low input voltages
(c) gate impedance
(d) cross coupling
34. Which of the following is correct for a gated D-type flip-flop?
(a) The Q output is either SET or RESET as soon as the D input goes HIGH or LOW.
(b) The output complement follows the input when enabled.
(c) Only one of the inputs can be HIGH at a time.
(d) The output toggles if one of the inputs is held HIGH.
35. What is the significance of the J and K terminals on the J-K flip-flop?
(a) There is no known significance in their designations.
(b) The J represents “jump,” which is how the Q output reacts whenever the clock goes HIGH and the J input is also HIGH.
(c) The letters represent the initials of Johnson and King, the co-inventors of the J-K flip-flop.
(d) All of the other letters of the alphabet are already in use.
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