555555555574. If both inputs of an S-R flip-flop are LOW, what will happen when the clock goes high? (a) No change will occur in the output. (b) An invalid state will exist. (c) The output will toggle. (d) The output will reset.
5555555555 38. If both inputs of an S-R NAND latch are LOW, what will happen to the output? (a) The output would become unpredictable. (b) The output will toggle. (c) The output will reset. (d) No change will occur in the output.
5555555555144. When both inputs of a J-K pulse-triggered FF are high and the clock cycles, the output will ________. (a) be invalid (b) not change (c) remain unchanged (d) toggle
5555555555102. Assume a J-K flip-flop has 1s on the J and K inputs. The next clock pulse will cause the output to ________. (a) set (b) reset (c) latch (d) toggle