111. Edge-triggered flip-flops must have:
(a) very fast response times.
(b) at least two inputs to handle rising and falling edges.
(c) a pulse transition detector.
(d) active-LOW inputs and complemented outputs.
112. Which of the following is correct for a D latch?
(a) The output toggles if one of the inputs is held HIGH.
(b) Q output follows the input D when the enable is HIGH.
(c) Only one of the inputs can be HIGH at a time.
(d) The output complement follows the input when enabled.
113. If both inputs of an S-R flip-flop are low, what will happen when the clock goes HIGH?
(a) An invalid state will exist.
(b) No change will occur in the output.
(c) The output will toggle.
(d) The output will reset.
114. What is the significance of the J and K terminals on the J-K flip-flop?
(a) There is no known significance in their designations.
(b) The J represents “jump,” which is how the Q output reacts whenever the clock goes high and the J input is also HIGH.
(c) The letters were chosen in honor of Jack Kilby, the inventory of the integrated circuit.
(d) All of the other letters of the alphabet are already in use.
115. The circuit that is primarily responsible for certain flip-flops to be designated as edge-triggered is the:
(a) edge-detection circuit.
(b) NOR latch.
(c) NAND latch.
(d) pulse-steering circuit.
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- 555555555574. If both inputs of an S-R flip-flop are LOW, what will happen when the clock goes high? (a) No change will occur in the output. (b) An invalid state will exist. (c) The output will toggle. (d) The output will reset.