76. A PAL16L8 has:
(a) 10 inputs and 8 outputs.
(b) 8 inputs and 8 outputs.
(c) 16 inputs and 16 outputs.
(d) 16 inputs and 8 outputs.
77. FPLA is:
(a) a nonmemory programmable device.
(b) a programmable AND array.
(c) a programmable OR array.
(d) All of the above
78. What is an OTP device?
(a) Optical transporting port
(b) Octal transmitting pixel
(c) Operational topical portable
(d) One-time programmable
79. When did the first PLD appear?
(a) More than 10 years ago
(b) More than 20 years ago
(c) More than 30 years ago
(d) More than 40 years ago
80. MPGA stands for:
(a) mass produced gated array.
(b) Morgan-Phillips gated array.
(c) memory programmed ROM.
(d) mask programmed ROM.
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101. All inputs to the MAX7000S device and all macrocell outputs feed the ________. (a) LUT (b) PIA (c) LAB (d) PIA and LAB 102. The major structures in the MAX7000S are the ________ and ________. (a) LUT, PIA (b) FMUX, LAB (c) LAB, PIA (d) LUT, FMUX 103. In the GAL16V8, the ________ selects the signal that is fed back into the input matrix. (a) FMUX (b) OMUX (c) PTMUX (d) TSMUX 104. In a GAL16V8, the D flip-flops contained in the OLMCs have ________ and ________. (a) asynchronous reset, synchronous preset (b) asynchronous preset, synchronous reset (c) asynchronous clear, synchronous set (d) asynchronous set, synchronous clear 105. In the MAX7000S device up to ________ signals can feed each LAB from the PIA. (a) 0 (b) 18 (c) 36 (d) 72 106. Design costs for standard cell ASICs are ________ those for MPGAs. (a) lower than (b) about the same as (c) higher than (d) none of the above 107. Gated arrays are ________ circuits that offer hundreds of thousands of gates. (a) VLSI (b) full custom (c) LSI (d) ULSI 108. Most FPGA logic modules utilize a(n) ________ approach to create the desired logic functions. (a) AND array…- Home » Electronics Engineering » Digital Electronics » Logic Families
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