Programmable Logic Devices – Exercise – 2

56. The distinction between CPLDs and FPGAs is ________.

(a) well known
(b) very small
(c) often fuzzy
(d) very large

Answer
Answer : (c)
Explanation
Explanation : No answer description available for this question. Let us discuss.
Discuss
Discuss : Write your answer. Click here.

57. The ________ is the most popular standard logic device family today.

(a) TTL
(b) CMOS
(c) ECL
(d) None of the above

Answer
Answer : (b)
Explanation
Explanation : No answer description available for this question. Let us discuss.
Discuss
Discuss : Write your answer. Click here.

58. How many product terms can a MAX+Plus II compiler borrow from adjacent macrocells in the same LAB?

(a) 0
(b) 5
(c) 10
(d) 20

Answer
Answer : (b)
Explanation
Explanation : No answer description available for this question. Let us discuss.
Discuss
Discuss : Write your answer. Click here.

59. What is the status of a tristate output buffer on a MAX7000S family device?

(a) It is permanently enabled or disabled.
(b) It is controlled by one of the two global output enable pins.
(c) It is controlled by other inputs or functions generated by other macrocells.
(d) All of the above

Answer
Answer : (d)
Explanation
Explanation : No answer description available for this question. Let us discuss.
Discuss
Discuss : Write your answer. Click here.

60. In a FLEX10K, what two outputs will the LE produce?

(a) The LAB and the fast track
(b) ON and OFF
(c) Hi-Z and ON
(d) Hi-Z and OFF

Answer
Answer : (a)
Explanation
Explanation : No answer description available for this question. Let us discuss.
Discuss
Discuss : Write your answer. Click here.

Related Posts

  • Programmable Logic Devices - Exercise - 3101. All inputs to the MAX7000S device and all macrocell outputs feed the ________. (a) LUT (b) PIA (c) LAB (d) PIA and LAB 102. The major structures in the MAX7000S are the ________ and ________. (a) LUT, PIA (b) FMUX, LAB (c) LAB, PIA (d) LUT, FMUX 103. In the GAL16V8, the ________ selects the signal that is fed back into the input matrix. (a) FMUX (b) OMUX (c) PTMUX (d) TSMUX 104. In a GAL16V8, the D flip-flops contained in the OLMCs have ________ and ________. (a) asynchronous reset, synchronous preset (b) asynchronous preset, synchronous reset (c) asynchronous clear, synchronous set (d) asynchronous set, synchronous clear 105. In the MAX7000S device up to ________ signals can feed each LAB from the PIA. (a) 0 (b) 18 (c) 36 (d) 72 106. Design costs for standard cell ASICs are ________ those for MPGAs. (a) lower than (b) about the same as (c) higher than (d) none of the above 107. Gated arrays are ________ circuits that offer hundreds of thousands of gates. (a) VLSI (b) full custom (c) LSI (d) ULSI 108. Most FPGA logic modules utilize a(n) ________ approach to create the desired logic functions. (a) AND array…
    Tags: lab, devices, logic, gal, device, max, inputs, array, programmable, standard
  • Logic Families - Mcqs/Notes/IQsHome » Electronics Engineering » Digital Electronics » Logic Families
    Tags: logic, digital, mcq, series
  • Logic Gates - Mcqs/Notes/IQsHome » Electronics Engineering » Digital Electronics » Logic Gates
    Tags: logic, digital, mcq, series
  • Display Devices and Systems - Mcqs/Notes/IQsHome » Electronics Engineering » Digital Electronics » Display Devices and Systems
    Tags: devices, systems, digital, mcq, series
  • Memory Devices - Mcqs/Notes/IQsHome » Electronics Engineering » Digital Electronics » Memory Devices
    Tags: devices, digital, mcq, series

LEAVE A REPLY

Please enter your comment!
Please enter your name here