Flip Flops – IQ – 1

Flip-Flops » IQ – 1

1. Define Flip flop ?
The basic unit for storage is flip flop. A flip-flop maintains its output state either at 1 or 0 until directed by an input signal to change its state.

2. What are the different types of flip-flop ?
There are various types of flip flops. Some of them are mentioned below they are :
RS flip-flop
SR flip-flop
D flip-flop
JK flip-flop
T flip-flop

3. What is the operation of D flip-flop ?
In D flip-flop during the occurrence of clock pulse if D=1, the output Q is set and if D=0, the output is reset.

4. What is the operation of JK flip-flop ?
•  When K input is low and J input is high the Q output of flip-flop is set.
•  When K input is high and J input is low the Q output of flip-flop is reset.
•  When both the inputs K and J are low the output does not change
•  When both the inputs K and J are high it is possible to set or reset the flip-flop (ie) the output toggle on the next positive clock edge.

5. What is the operation of T flip-flop ?
T flip-flop is also known as Toggle flip-flop.
•  When T=0 there is no change in the output.
•  When T=1 the  output  switch to  the  complement  state  (ie)  the output toggles.

6. Define race around condition ?
In JK flip-flop output is fed back to the input. Therefore change in the output results change in the input. Due to this in the positive half of the clock pulse if both J and K are high then output toggles continuously. This condition is called ‘race around condition’.

7. What is edge-triggered flip-flop ?
The problem of race around condition can solved by edge triggering  flip  flop.  The term  edge  triggering means that the flip-flop changes state either at the positive edge or negative edge of the clock pulse and it is sensitive to its inputs only at this transition of the clock.

8. What is a master-slave flip-flop ?
A master-slave flip-flop consists of two flip-flops where one circuit serves as a master and the other as a slave.

9. Define rise time ?
The time required to change the voltage level from 10% to 90% is known as rise time(t_r).

10. Define fall time ?
The time required to change the voltage level from 90% to 10% is known as fall time(t_f).

11. Define skew and clock skew ?
The phase shift between the rectangular clock waveforms is referred to as skew and the time delay between the two clock pulses is called clock skew.

12. Define setup time ?
The setup time is the minimum time required to maintain a constant voltage levels at the excitation inputs of the flip-flop device priorto the triggering edge of the clock pulse in order for the levels to be reliably clocked into the flip flop. It is denoted as t_setup.

13. Define hold time ?
The hold time is the minimum time for which the voltage levels at the excitation inputs must remain constant after the triggering edge of the clock pulse in order for the levels to be reliably clocked into the flip flop. It is denoted as t_hold .

14. Define propagation delay ?
A propagation delay is the time required to change the output after the application of the input.

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