Shift Registers – 74

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76. A 4-bit PISO shift register that receives 4 bits of parallel data will shift to the ________ by ________ position(s) for each clock pulse.

(a) right, one
(b) right, two
(c) left, one
(d) left, three

Answer
Answer : (a)
Explanation
Explanation : No answer description available for this question. Let us discuss.
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