Shift Registers – 36

Shift Registers » Exercise – 1

36. Assume a 4-bit parallel in/serial out shift register is loaded with a binary number. How many clock pulses are required after the parallel load has occurred before the first bit in the sequence appears on the serial output line?

(a) 0
(b) 1
(c) 2
(d) 3

Answer
Answer : (b)
Explanation
Explanation : No answer description available for this question. Let us discuss.
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