555555555531. If a signal passing through a gate is inhibited by sending a low into one of the inputs, and the output is HIGH, the gate is a(n): (a) AND (b) NAND (c) NOR (d) OR
Logic Gates » Exercise - 121. If a signal passing through a gate is inhibited by sending a low into one of the inputs, and the output is HIGH, the gate is a(n) : (a) OR (b) AND (c) NOR (d) NAND
Logic Gates » Exercise - 126. A NAND gate has : (a) LOW inputs and a HIGH output (b) LOW inputs and a LOW output (c) HIGH inputs and a HIGH output (d) None of the these
5555555555116. The logic gate that will have a LOW output when any one of its inputs is HIGH is the: (a) NAND gate (b) AND gate (c) NOR gate (d) OR gate
555555555542. A NAND gate has: (a) LOW inputs and a LOW output (b) HIGH inputs and a HIGH output (c) LOW inputs and a HIGH output (d) None of the these