# Logic Gates – 21

21. If a signal passing through a gate is inhibited by sending a low into one of the inputs, and the output is HIGH, the gate is a(n) :

(a) OR
(b) AND
(c) NOR
(d) NAND

Explanation
Explanation : No answer description available for this question. Let us discuss.
 Subject Name : Electronics Engineering Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant
 Electronics & Communication Engineering Books Sale Question Bank On Electronics & Communication Engineering Book - question bank on electronics & communication engineering; Language: english; Binding: paperback ₹ 308 Sale A Handbook for Electronics Engineering(Old Edition) Made Easy Editorial Board (Author); Marathi (Publication Language); 620 Pages - 01/01/2015 (Publication Date) - Made Easy Publications (Publisher) ₹ 241 Sale Basic Electronic Devices and Circuits Patil (Author); English (Publication Language) ₹ 293 Sale Electronic Circuits: Analysis and Design (SIE) | 3rd Edition Neamen, Donald (Author); English (Publication Language); 1351 Pages - 08/25/2006 (Publication Date) - McGraw Hill Education (Publisher) ₹ 656

## Related Posts

• 555555555556. If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and the output is HIGH, the gate is a(n): (a) AND (b) NAND (c) NOR (d) OR
Tags: gate, logic, gates, signal, passing, inhibited, sending, low, inputs, output
• 555555555531. If a signal passing through a gate is inhibited by sending a low into one of the inputs, and the output is HIGH, the gate is a(n): (a) AND (b) NAND (c) NOR (d) OR
Tags: gate, logic, gates, signal, passing, inhibited, sending, low, inputs, output
• 555555555542. A NAND gate has: (a) LOW inputs and a LOW output (b) HIGH inputs and a HIGH output (c) LOW inputs and a HIGH output (d) None of the these
Tags: low, inputs, output, high, logic, gates, nand, gate, electronics, engineering
• Logic Gates » Exercise - 126. A NAND gate has : (a) LOW inputs and a HIGH output (b) LOW inputs and a LOW output (c) HIGH inputs and a HIGH output (d) None of the these
Tags: inputs, low, high, output, logic, gates, exercise, nand, gate, electronics
• 555555555558. The output of an AND gate with three inputs, A, B, and C, is HIGH when ________. (a) A = 1, B = 1, C = 0 (b) A = 0, B = 0, C = 0 (c) A = 1, B = 1, C = 1 (d) A = 1, B = 0, C = 1
Tags: logic, gates, output, gate, inputs, high, electronics, engineering