41. Using the schematic diagram of a TTL NAND gate, determine the state of each transistor (ON or OFF) when all inputs are high.
(a) Q1-ON, Q2-OFF, Q3-ON, Q4-OFF
(b) Q1-ON, Q2-ON, Q3-OFF, Q4-OFF
(c) Q1-OFF, Q2-OFF, Q3-ON, Q4-ON
(d) Q1-OFF, Q2-ON, Q3-OFF, Q4-ON
42. A TTL totem-pole circuit is designed so that the output transistors:
(a) are always on together
(b) provide linear phase splitting
(c) provide voltage regulation
(d) are never on together
43. An open collector output can ________ current, but it cannot ________.
(a) sink, source current
(b) source, sink current
(c) sink, source voltage
(d) source, sink voltage
44. The time needed for an output to change from the result of an input change is known as:
(a) noise immunity
(b) fan-out
(c) propagation delay
(d) rise time
45. Fan-out is determined by taking the ________ result(s) of ________.
(a) smaller,
(b) larger,
(c) smaller,
(d) average,
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