Linear Digital ICs – 27

5555555555

27. When is the counter set to zero in the dual-slope method of conversion?

(a) Prior to the charging of the capacitor of the integrator
(b) While the capacitor is being charged
(c) At the end of the charging of the capacitor
(d) During the discharging of the capacitor

Answer
Answer : (c)
Explanation
Explanation : No answer description available for this question. Let us discuss.
Subject Name : Electronics Engineering
Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT
Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant
Electronics & Communication Engineering Books

Sale
Question Bank On Electronics & Communication Engineering
Book - question bank on electronics & communication engineering; Language: english; Binding: paperback
₹ 317
Sale
A Handbook for Electronics Engineering(Old Edition)
Made Easy Editorial Board (Author); Marathi (Publication Language); 620 Pages - 01/01/2015 (Publication Date) - Made Easy Publications (Publisher)
₹ 320
Basic Electronic Devices and Circuits
Patil (Author); English (Publication Language)
Sale
Electronic Circuits: Analysis and Design (SIE) | 3rd Edition
Neamen, Donald (Author); English (Publication Language); 1351 Pages - 08/25/2006 (Publication Date) - McGraw Hill Education (Publisher)
₹ 700

GATE 2023 Total InfoENGG DIPLOMAUGC NET Total Info
IES 2023 Total InfoPSUs 2022 Total InfoCSIR UGC NET Total Info
JAM 2023 Total InfoM TECH 2023 Total InfoRAILWAY 2022 Total Info

Related Posts

  • Linear Digital ICs - 33555555555533. At which of the following period(s) is the counter advanced (incremented) in dual-slope conversion? (a) During the charging of the capacitor of the integrator (b) During the discharging of the capacitor of the integrator (c) During both the charging and discharging of the capacitor of the integrator (d) None of the above
    Tags: capacitor, integrator, charging, discharging, linear, digital, ics, counter, dual-slope, conversion
  • Counters - Exercise - 1Counters » Exercise - 1 1. The purpose of introducing feedback loop in digital counter circuit is : (a) To improve distortion (b) To improve stability (c) Synchronise input and output pulses (d) to reduce the number of input pulses to reset the counter 2. The circuit shown below is a : (a) Mod-4 counter (b) Mod-5 counter (c) Mod-6 counter (d) Mod-7 counter 3. In this type of counter, the output of the last stage is connected to the D input of the first stage. (a) Ring Counter (b) Johnson Counter (c) Straight Counter (d) None of the above 4. A counter is a : (a) Sequential circuit (b) Combinational circuit (c) Both combinational and sequential circuit (d) None of above 5. A counter with 10 states : (a) Cascading asynchronous counter (b) Decade counter (c) Asynchronous ripple counter (d) Ripple counter 6. In this type of counter, the complement of the output of the last stage of the shift register is fed back to the D input of the first state. (a) Ring Counter (b) Johnson Counter (c) Straight Counter (d) None of the above 7. It is a sequential circuit that cycles through a sequence of states : (a) Multiplexer (b) Demultiplexer (c) Counter…
    Tags: counter, electronics, engineering
  • Linear Digital ICs - 31555555555531. Which of the following devices is (are) a component of a digital-to-analog converter (DAC)? (a) Integrator (b) Comparator (c) Digital counter (d) All of the above
    Tags: digital, linear, ics, integrator, counter, electronics, engineering
  • Linear Digital ICs - 47555555555547. For the RS-232C circuit, ________ is a mark and ________ is a space. (a) 12 V, –12 V (b) –12 V, 12 V (c) 5 V, 0 V (d) –5 V, 0 V
    Tags: linear, digital, ics, electronics, engineering
  • Linear Digital ICs - 40555555555540. How many comparators does a 339 IC contain? (a) 4 (b) 3 (c) 2 (d) 1
    Tags: linear, digital, ics, electronics, engineering

LEAVE A REPLY

Please enter your comment!
Please enter your name here