Flip Flops – 69

5555555555

69. Which of the following is correct for a gated D flip-flop?

(a) The output toggles if one of the inputs is held HIGH.
(b) Only one of the inputs can be HIGH at a time.
(c) The output complement follows the input when enabled.
(d) Q output follows the input D when the enable is HIGH.

Answer
Answer : (d)
Explanation
Explanation : No answer description available for this question. Let us discuss.
Subject Name : Electronics Engineering
Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT
Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant
Electronics & Communication Engineering Books

Sale
Question Bank On Electronics & Communication Engineering
Book - question bank on electronics & communication engineering; Language: english; Binding: paperback
₹ 317
Sale
A Handbook for Electronics Engineering(Old Edition)
Made Easy Editorial Board (Author); Marathi (Publication Language); 620 Pages - 01/01/2015 (Publication Date) - Made Easy Publications (Publisher)
₹ 320
Basic Electronic Devices and Circuits
Patil (Author); English (Publication Language)
Sale
Electronic Circuits: Analysis and Design (SIE) | 3rd Edition
Neamen, Donald (Author); English (Publication Language); 1351 Pages - 08/25/2006 (Publication Date) - McGraw Hill Education (Publisher)
₹ 700

GATE 2023 Total InfoENGG DIPLOMAUGC NET Total Info
IES 2023 Total InfoPSUs 2022 Total InfoCSIR UGC NET Total Info
JAM 2023 Total InfoM TECH 2023 Total InfoRAILWAY 2022 Total Info

Related Posts

  • Flip Flops - 1125555555555112. Which of the following is correct for a D latch? (a) The output toggles if one of the inputs is held HIGH. (b) Q output follows the input D when the enable is HIGH. (c) Only one of the inputs can be HIGH at a time. (d) The output complement follows the input when enabled.
    Tags: high, output, inputs, input, flip, flops, correct, toggles, held, enable
  • Flip Flops - 34555555555534. Which of the following is correct for a gated D-type flip-flop? (a) The Q output is either SET or RESET as soon as the D input goes HIGH or LOW. (b) The output complement follows the input when enabled. (c) Only one of the inputs can be HIGH at a time. (d) The output toggles if one of the inputs is held HIGH.
    Tags: output, high, input, inputs, held, toggles, time, enabled, complement, flip
  • Flip Flops - 68555555555568. When is a flip-flop said to be transparent? (a) when the Q output is opposite the input (b) when the Q output follows the input (c) (d)
    Tags: input, output, flip, flops, flip-flop, electronics, engineering
  • Introduction to Digital Systems - 12555555555512. The output of an OR gate is LOW when ________. (a) all inputs are LOW (b) any input is LOW (c) any input is HIGH (d) all inputs are HIGH
    Tags: inputs, input, high, output, electronics, engineering
  • Flip Flops - 1175555555555117. What is one disadvantage of an S-R flip-flop? (a) It has no enable input. (b) It has an invalid state. (c) It has no clock input. (d) It has only a single output.
    Tags: input, flip, flops, flip-flop, enable, output, electronics, engineering

LEAVE A REPLY

Please enter your comment!
Please enter your name here