Counters – 125

125. A J-K flip-flop is reset and must stay reset after the clock pulse. This transition requires that ________.

(a) J and K inputs must both = 0
(b) J must be 0, K doesn’t matter
(c) J doesn’t matter, K must = 0
(d) J must be 0 and K must be 1

Answer

Answer : (b)

Explanation

Explanation : No answer description available for this question. Let us discuss.

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Flip-Flops » Exercise - 120. The master slave JK flip-flop is effectively a combination of : (a) an SR flip-flop and a D flip-flop (b) an SR flip-flop and a T flip-flop (c) a T flip-flop and a D flip-flop (d) two T flip-flops
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Counters - 36
Counters » Exercise - 136. The terminal count of a typical modulus-10 binary counter is ________. (a) 0000 (b) 1010 (c) 1001 (d) 1111
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Counters - 37
Counters » Exercise - 137. A 4-bit up/down binary counter is in the DOWN mode and in the 1100 state. To what state does the counter go on the next clock pulse? (a) 1101 (b) 1011 (c) 1111 (d) 0000
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