Shift Registers » Exercise - 128. The group of bits 10110111 is serially shifted (right-most bit first) into an 8-bit parallel output shift register with an initial state 11110000. After two clock pulses, the register contains ________. (a) 10111000 (b) 10110111 (c) 11110000 (d) 11111100
Shift Registers » Exercise - 125. How much storage capacity does each stage in a shift register represent? (a) One bit (b) Two bits (c) Four bits (one nibble) (d) Eight bits (one byte)