Shift Registers » Exercise – 1
55. When is it important to use a three-state buffer?
(a) when two or more outputs are connected to the same input
(b) when all outputs are normally HIGH
(c) when all outputs are normally LOW
(d) when two or more outputs are connected to two or more inputs
| Subject Name : Electronics Engineering |
| Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT |
| Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant |
| Electronics & Communication Engineering Books
|
| GATE 2023 Total Info | ENGG DIPLOMA | UGC NET Total Info |
| IES 2023 Total Info | PSUs 2022 Total Info | CSIR UGC NET Total Info |
| JAM 2023 Total Info | M TECH 2023 Total Info | RAILWAY 2022 Total Info |
Related Posts
Shift Registers » Exercise - 166. What is a recirculating register? (a) serial out connected to serial in (b) all Q outputs connected together (c) a r (d)- 555555555549. For the device shown here, assume the D input is LOW, both S inputs are LOW, and the input is LOW. What is the status of the outputs? (a) All are HIGH. (b) All are LOW. (c) All but are LOW. (d) All but are HIGH.
- Shift Registers » Exercise - 118. In a parallel in/parallel out shift register, D0 = 1, D1 = 1, D2 = 1, and D3 = 0. After three clock pulses, the data outputs are ________. (a) 1110 (b) 0001 (c) 1100 (d) 1000
- Shift Registers » Exercise - 154. What does the output enable do on the 74395A chip? (a) It determines when data can be loaded. (b) It forces all outputs to go HIGH. (c) It forces all outputs to go LOW. (d) It activates the three-state buffer.
- Shift Registers » Exercise - 1 2. There are ___________ basic types of shift registers. (a) Six (b) Four (c) One (d) Many