Shift Registers » Exercise - 133. With a 200 kHz clock frequency, eight bits can be serially entered into a shift register in ________. (a) 4 μs (b) 40 μs (c) 400 μs (d) 40 ms
Shift Registers » Exercise - 140. When an 8-bit serial in/serial out shift register is used for a 20 s time delay, the clock frequency is ________. (a) 40 kHz (b) 50 kHz (c) 400 kHz (d) 500 kHz
Shift Registers » Exercise - 141. An 8-bit serial in/serial out shift register is used with a clock frequency of 150 kHz. What is the time delay between the serial input and the Q3 output? (a) 1.67 s (b) 26.67 s (c) 26.7 ms (d) 267 ms
Shift Registers » Exercise - 118. In a parallel in/parallel out shift register, D0 = 1, D1 = 1, D2 = 1, and D3 = 0. After three clock pulses, the data outputs are ________. (a) 1110 (b) 0001 (c) 1100 (d) 1000
Shift Registers » Exercise - 166. What is a recirculating register? (a) serial out connected to serial in (b) all Q outputs connected together (c) a r (d)