21. What is the major advantage of ECL logic?
(a) very high speed
(b) wide range of operating voltage
(c) very low cost
(d) very high power
22. How is the speed–power product of a logic family determined?
(a) The propagation delay in s is multiplied by the power dissipation in mW.
(b) The propagation delay in ms is multiplied by the power dissipation in W.
(c) The propagation delay in ns is multiplied by the power dissipation in mW.
(d) The propagation delay in ns is multiplied by the power dissipation in W.
23. The problem of the VOH(min) of a TTL IC being too low to drive a CMOS circuit and meet the CMOS requirement of VIH(min) is usually easily overcome by:
(a) adding a fixed voltage-divider bias resistive network at the output of the TTL device
(b) avoiding this condition and only using TTL to drive TTL
(c) adding an external pull-down resistor to ground
(d) adding an external pull-up resistor to VCC
24. Why is the operating frequency for CMOS devices critical for determining power dissipation?
(a) At low frequencies, power dissipation increases.
(b) At high frequencies, the gate will only be able to deliver 70.7 % of rated power.
(c) At high frequencies, charging and discharging the gate capacitance will draw a heavy current from the power supply and thus increase power dissipation.
(d) At high frequencies, the gate will only be able to deliver 70.7 % of rated power and charging and discharging the gate capacitance will draw a heavy current from the power supply and thus increase power dissipation.
25. The problem of different current requirements when CMOS logic circuits are driving TTL logic circuits can usually be overcome by the addition of:
(a) a CMOS inverting bilateral switch between the stages
(b) a TTL tristate inverting buffer between the stages
(c) a CMOS noninverting bilateral switch between the stages
(d) a CMOS buffer or inverting buffer
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