Counters – 49

Counters » Exercise – 1

49. In a VHDL retriggerable edge-triggered one-shot, which condition will not exist when a clock edge occurs?

(a) A trigger edge has occurred and we must load the counter.
(b) The counter is zero and we need to keep it at zero.
(c) The shift register is reset.
(d) The counter is not zero and we need to count down by one.

Answer
Answer : (c)
Explanation
Explanation : No answer description available for this question. Let us discuss.
Subject Name : Electronics Engineering
Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT
Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant
Electronics & Communication Engineering Books

Sale
Question Bank On Electronics & Communication Engineering
Book - question bank on electronics & communication engineering; Language: english; Binding: paperback
₹ 287
Sale
A Handbook for Electronics Engineering(Old Edition)
Made Easy Editorial Board (Author); Marathi (Publication Language); 620 Pages - 01/01/2015 (Publication Date) - Made Easy Publications (Publisher)
₹ 315
Basic Electronic Devices and Circuits
Patil (Author); English (Publication Language)
Sale
Electronic Circuits: Analysis and Design (SIE) | 3rd Edition
Neamen, Donald (Author); English (Publication Language); 1351 Pages - 08/25/2006 (Publication Date) - McGraw Hill Education (Publisher)
₹ 710

GATE 2023 Total InfoENGG DIPLOMAUGC NET Total Info
IES 2023 Total InfoPSUs 2022 Total InfoCSIR UGC NET Total Info
JAM 2023 Total InfoM TECH 2023 Total InfoRAILWAY 2022 Total Info

Related Posts

  • Counters - 65Counters » Exercise - 165. A decade counter will count through decimal ________. (a) 10 (b) 9 (c) 15 (d) 0
    Tags: counters, exercise, counter, will, count, electronics, engineering
  • Counters - 15Counters » Exercise - 115. A MOD-16 ripple counter is holding the count 10012. What will the count be after 31 clock pulses? (a) 10002 (b) 10102 (c) 10112 (d) 11012
    Tags: count, counters, exercise, counter, will, clock, electronics, engineering
  • Counters - 111Counters » Exercise - 1111. ________ is the modulus of the counter shown below. (a) 200 (b) 19 (c) 0.005 (d) 5000
    Tags: counters, exercise, counter, electronics, engineering
  • Counters - Exercise - 1Counters » Exercise - 1 1. The purpose of introducing feedback loop in digital counter circuit is : (a) To improve distortion (b) To improve stability (c) Synchronise input and output pulses (d) to reduce the number of input pulses to reset the counter 2. The circuit shown below is a : (a) Mod-4 counter (b) Mod-5 counter (c) Mod-6 counter (d) Mod-7 counter 3. In this type of counter, the output of the last stage is connected to the D input of the first stage. (a) Ring Counter (b) Johnson Counter (c) Straight Counter (d) None of the above 4. A counter is a : (a) Sequential circuit (b) Combinational circuit (c) Both combinational and sequential circuit (d) None of above 5. A counter with 10 states : (a) Cascading asynchronous counter (b) Decade counter (c) Asynchronous ripple counter (d) Ripple counter 6. In this type of counter, the complement of the output of the last stage of the shift register is fed back to the D input of the first state. (a) Ring Counter (b) Johnson Counter (c) Straight Counter (d) None of the above 7. It is a sequential circuit that cycles through a sequence of states : (a) Multiplexer (b) Demultiplexer (c) Counter…
    Tags: counter, electronics, engineering
  • Counters - 109Counters » Exercise - 1109. The circuit shown below is a ________. (a) Johnson counter (b) ring counter (c) decade counter (d) BCD counter
    Tags: counter, counters, exercise, electronics, engineering

LEAVE A REPLY

Please enter your comment!
Please enter your name here