46. The circuit given below fails to produce data output. The individual flip-flops are checked with a logic probe and pulser, and each checks OK. What could be causing the problem?
(a) The data output line may be grounded. (b) One of the clock input lines may be open. (c) One of the interconnect lines between two stages may have a solder bridge to ground. (d) One of the flip-flops may have a solder bridge between its input and Vcc.
Answer : (b)
Explanation : No answer description available for this question. Let us discuss.
Counters » Exercise - 195. For a multistage counter to be truly synchronous, the ________ of each stage must be connected to ________. (a) Cp, the same clock input line (b) CE, the same clock input line (c) , the terminal count output (d) , both clock input lines