# Logic Gates – 98

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98. A clock signal with a period of 1 s is applied to the input of an enable gate. The output must contain six pulses. How long must the enable pulse be active?

(a) Enable must be active for 0 s.
(b) Enable must be active for 3 s.
(c) Enable must be active for 6 s.
(d) Enable must be active for 12 s.

Explanation
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