Linear Digital ICs – Exercise – 1

Linear Digital ICs » Exercise – 1

1. In a comparator, the level of the reference voltage must be ________.

(a) negative
(b) positive
(c) zero
(d) All of the above

Answer
Answer : (d)
Explanation
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2. Which of the following applications include a phase-locked loop (PLL) circuit?

(a) Modems
(b) Am decoders
(c) Tracking filters
(d) All of the above

Answer
Answer : (d)
Explanation
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3. What is the first phase of the dual-slope method of conversion?

(a) Connecting the analog voltage to the integrator for a fixed time
(b) Setting the counter to zero
(c) Connecting the integrator to a reference voltage
(d) All of the above

Answer
Answer : (a)
Explanation
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4. What is the minimum number of conversions per second of a clock rate of 1 MHz operating a 10-stage counter in an ADC?

(a) 1000
(b) 976
(c) 769
(d) 697

Answer
Answer : (b)
Explanation
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5. In a 555 timer, a series connection of three resistors sets the reference voltage levels to the two comparators at ________ and ________.

(a) 2VCC / 3, VCC / 3
(b) VCC / 2, VCC / 4
(c) VCC, VCC / 2
(d) VCC, VCC

Answer
Answer : (a)
Explanation
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