86. The process of designing a synchronous counter that will count in a nonbinary manner is primarily based on:
(a) external logic circuits that decode the various states of the counter to apply the correct logic levels to the J-K inputs (b) modifying BCD counters to change states on every second input clock pulse (c) modifying asynchronous counters to change states on every second input clock pulse (d) elimination of the counter stages and the addition of combinational logic circuits to produce the desired counts
Answer
Answer : (a)
Explanation
Explanation : No answer description available for this question. Let us discuss.
Counters » Exercise - 1 8. It is a counter where the flip-flops do not change states at exactly the same time, as they do not have a common clock pulse. (a) Asynchronous Ripple Counter (b) Synchronous Ripple Counter (c) Counter (d) All of the above
Counters » Exercise - 1 1. The purpose of introducing feedback loop in digital counter circuit is : (a) To improve distortion (b) To improve stability (c) Synchronise input and output pulses (d) to reduce the number of input pulses to reset the counter 2. The circuit shown below is a : (a) Mod-4 counter (b) Mod-5 counter (c) Mod-6 counter (d) Mod-7 counter 3. In this type of counter, the output of the last stage is connected to the D input of the first stage. (a) Ring Counter (b) Johnson Counter (c) Straight Counter (d) None of the above 4. A counter is a : (a) Sequential circuit (b) Combinational circuit (c) Both combinational and sequential circuit (d) None of above 5. A counter with 10 states : (a) Cascading asynchronous counter (b) Decade counter (c) Asynchronous ripple counter (d) Ripple counter 6. In this type of counter, the complement of the output of the last stage of the shift register is fed back to the D input of the first state. (a) Ring Counter (b) Johnson Counter (c) Straight Counter (d) None of the above 7. It is a sequential circuit that cycles through a sequence of states : (a) Multiplexer (b) Demultiplexer (c) Counter…