5555555555
120. How many 8 k × 1 RAMs are required to achieve a memory with a word capacity of 8 k and a word length of eight bits?
(a) Eight
(b) Four
(c) Two
(d) One
| Subject Name : Electronics Engineering |
| Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT |
| Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant |
| Electronics & Communication Engineering Books |
| GATE 2023 Total Info | ENGG DIPLOMA | UGC NET Total Info |
| IES 2023 Total Info | PSUs 2022 Total Info | CSIR UGC NET Total Info |
| JAM 2023 Total Info | M TECH 2023 Total Info | RAILWAY 2022 Total Info |
Related Posts
5555555555122. How many address bits are required for a 4096-bit memory organized as a 512 × 8 memory? (a) 2 (b) 4 (c) 8 (d) 9- 555555555560. For the given circuit, what is the bit length of the output data word? (a) 3 (b) 4 (c) 8 (d) 32
- 555555555585. How many address lines would be required for a 2K × 4 memory chip? (a) 8 (b) 10 (c) 11 (d) 12
- 5555555555133. The bit capacity of a memory that has 2048 addresses and can store 8 bits at each address is ________. (a) 4096 (b) 8129 (c) 16358 (d) 32768
- 5555555555106. Why do most dynamic RAMs use a multiplexed address bus? (a) It is the only way to do it. (b) to make it faster (c) to keep the nu (d)