5555555555
3. Which transistor bias circuit arrangement provides good stability using negative feedback from collector to base?
(a) base bias
(b) collector-feedback bias
(c) voltage-divider bias
(d) emitter bias
| Subject Name : Electronics Engineering |
| Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT |
| Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant |
| Electronics & Communication Engineering Books |
| GATE 2023 Total Info | ENGG DIPLOMA | UGC NET Total Info |
| IES 2023 Total Info | PSUs 2022 Total Info | CSIR UGC NET Total Info |
| JAM 2023 Total Info | M TECH 2023 Total Info | RAILWAY 2022 Total Info |
Related Posts
555555555528. The most stable biasing technique used is the (a) voltage-divider bias. (b) base bias. (c) emitter bias. (d) collector bias.- 555555555527. Which transistor bias circuit arrangement has poor stability because its Q-point varies widely with DC? (a) base bias (b) collector-feedback bias (c) voltage-divider bias (d) emitter bias
- 555555555526. Which transistor bias circuit provides good Q-point stability with a single-polarity supply voltage? (a) base bias (b) collector-feedback bias (c) voltage-divider bias (d) emitter bias
- 555555555525. What is the most common bias circuit? (a) base (b) collector (c) emitter (d) voltage-divider
- 555555555511. Voltage-divider bias has a relatively stable Q-point, as does (a) base bias. (b) collector-feedback bias. (c) both of the above (d) none of the above