5555555555
21. Refreshing DRAM typically must occur every ________.
(a) 2 s
(b) 2 ms
(c) 8 s
(d) 8 ms
| Subject Name : Electronics Engineering |
| Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT |
| Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant |
| Electronics & Communication Engineering Books |
| GATE 2023 Total Info | ENGG DIPLOMA | UGC NET Total Info |
| IES 2023 Total Info | PSUs 2022 Total Info | CSIR UGC NET Total Info |
| JAM 2023 Total Info | M TECH 2023 Total Info | RAILWAY 2022 Total Info |
Related Posts
555555555546. Typically, how often is DRAM refreshed? (a) 2 to 8 ms (b) 4 to 16 ms (c) 8 to 16 s (d) 1 to 2 s- 5555555555167. The number of 16k × 4 memories needed to construct a 128k × 8 memory is ________. (a) 4 (b) 8 (c) 12 (d) 16
- 5555555555110. The refresh period for capacitors used in DRAMs is ________. (a) 2 ms (b) 2 s (c) 64 ms (d) 64 s
- 5555555555109. What is the maximum time required before a dynamic RAM must be refreshed? (a) 2 ms (b) 4 ms (c) 8 ms (d) 10 ms
- 555555555552. Transistors are ________-terminal devices. (a) 2 (b) 3 (c) 4 (d) 5