5555555555
160. The address space of a RAM memory can be expanded using a decoder and additional memory ICs. The output of the decoder should be connected to which input line of the memory?
(a) The most significant address inputs
(b) The most significant data inputs
(c) The read/write line
(d) The chip enable
| Subject Name : Electronics Engineering |
| Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT |
| Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant |
| Electronics & Communication Engineering Books |
| GATE 2023 Total Info | ENGG DIPLOMA | UGC NET Total Info |
| IES 2023 Total Info | PSUs 2022 Total Info | CSIR UGC NET Total Info |
| JAM 2023 Total Info | M TECH 2023 Total Info | RAILWAY 2022 Total Info |
Related Posts
555555555544. To which pin on the RAM chip does the address decoder connect in order to signal which memory chip is being accessed? (a) The address input (b) The output enable (c) The chip enable (d) The data input- 5555555555151. Because 4096 = 212, a 4K × 1 RAM requires ________ address bits to access all locations. (a) 4096 (b) 10 (c) 12 (d) 1024
- 555555555570. The TMS44100 has ________ address inputs. (a) 10 (b) 11 (c) 12 (d) 13
- 555555555537. How many address bits are needed to select all memory locations in the 2118 16K × 1 RAM? (a) 8 (b) 10 (c) 14 (d) 16
- 5555555555135. The location of a unit of data in a memory array is called its ________. (a) storage (b) RAM (c) address (d) data