5555555555
75. What type of logic circuit is shown below and what logic function is being performed?
(a) It is an NMOS AND gate.
(b) It is a CMOS AND gate.
(c) It is a CMOS NOR gate.
(d) It is a PMOS NAND gate.
| Subject Name : Electronics Engineering |
| Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT |
| Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant |
| Electronics & Communication Engineering Books |
| GATE 2023 Total Info | ENGG DIPLOMA | UGC NET Total Info |
| IES 2023 Total Info | PSUs 2022 Total Info | CSIR UGC NET Total Info |
| JAM 2023 Total Info | M TECH 2023 Total Info | RAILWAY 2022 Total Info |
Related Posts
555555555540. A logic circuit whose output is LOW when at least one input is HIGH is a(n) _________ gate. (a) NOR (b) AND (c) NAND (d) exclusive-OR gate- Logic Gates » Exercise - 116. A NAND gate is equivalent to an AND gate plus a …........ gate put together. (a) NOR (b) NOT (c) XOR (d) XNOR
- 555555555558. ________ output levels would not be a valid LOW for a TTL gate. (a) 0.2 V (b) 0.3 V (c) 0.5 V (d) All of the above.
- 5555555555158. If both inputs of a 2-input NOR gate are connected, the gate will function as an ________. (a) OR gate (b) AND gate (c) inverter (d) any of the above
- 555555555537. If all inputs to a TTL NAND gate are low, what is the ON, OFF condition of each transistor in the circuit? (a) Q1-ON, Q2-OFF, Q3-ON, Q4-OFF (b) Q1-ON, Q2-ON, Q3-OFF, Q4-OFF (c) Q1-OFF, Q2-OFF, Q3-ON, Q4-ON (d) Q1-OFF, Q2-ON, Q3-OFF, Q4-ON