5555555555
25. The problem of different current requirements when CMOS logic circuits are driving TTL logic circuits can usually be overcome by the addition of:
(a) a CMOS inverting bilateral switch between the stages
(b) a TTL tristate inverting buffer between the stages
(c) a CMOS noninverting bilateral switch between the stages
(d) a CMOS buffer or inverting buffer
Subject Name : Electronics Engineering |
Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT |
Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant |
Electronics & Communication Engineering Books |
GATE 2023 Total Info | ENGG DIPLOMA | UGC NET Total Info |
IES 2023 Total Info | PSUs 2022 Total Info | CSIR UGC NET Total Info |
JAM 2023 Total Info | M TECH 2023 Total Info | RAILWAY 2022 Total Info |