5555555555
113. For a CMOS gate, which is the best speed-power product?
(a) 1.4 pJ
(b) 1.6 pJ
(c) 2.4 pJ
(d) 3.3 pJ
| Subject Name : Electronics Engineering |
| Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT |
| Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant |
| Electronics & Communication Engineering Books |
| GATE 2023 Total Info | ENGG DIPLOMA | UGC NET Total Info |
| IES 2023 Total Info | PSUs 2022 Total Info | CSIR UGC NET Total Info |
| JAM 2023 Total Info | M TECH 2023 Total Info | RAILWAY 2022 Total Info |
Related Posts
555555555562. If the input to a NOT gate is A and the output is X, then ________. (a) X = A (b) (c) X = 0 (d) none of the above- 555555555547. What is the range of invalid TTL output voltage? (a) 0.0–0.4 V (b) 0.4–2.4 V (c) 2.4–5.0 V (d) 0.0–5.0 V
- 555555555528. The 1's complement of 1010102 is _________. (a) 0101102 (b) 0101012 (c) 1101112 (d) 1010112
- 5555555555104. The HIGH logic level for a standard TTL output must be at least ________. (a) 2.4 V (b) 2 V (c) 0.8 V (d) 5 V
- 5555555555126. The number of input combinations for a 4-input gate is ________. (a) 9 (b) 8 (c) 15 (d) 16