Logic Families – 104

5555555555

104. The HIGH logic level for a standard TTL output must be at least ________.

(a) 2.4 V
(b) 2 V
(c) 0.8 V
(d) 5 V

Answer
Answer : (a)
Explanation
Explanation : No answer description available for this question. Let us discuss.
Subject Name : Electronics Engineering
Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT
Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant
Electronics & Communication Engineering Books

GATE 2023 Total InfoENGG DIPLOMAUGC NET Total Info
IES 2023 Total InfoPSUs 2022 Total InfoCSIR UGC NET Total Info
JAM 2023 Total InfoM TECH 2023 Total InfoRAILWAY 2022 Total Info

Related Posts

  • Logic Families - 47555555555547. What is the range of invalid TTL output voltage? (a) 0.0–0.4 V (b) 0.4–2.4 V (c) 2.4–5.0 V (d) 0.0–5.0 V
    Tags: logic, families, ttl, output, electronics, engineering
  • Logic Families - 46555555555546. What is the standard TTL noise margin? (a) 5.0 V (b) 0.0 V (c) 0.8 V (d) 0.4 V
    Tags: logic, families, standard, ttl, electronics, engineering
  • Logic Families - 57555555555557. The propagation delay of standard TTL gates is approximately ________. (a) 2 s (b) 1 s (c) 4 ns (d) 10 ns
    Tags: logic, families, standard, ttl, electronics, engineering
  • Logic Families - 39555555555539. The most common TTL series ICs are: (a) E-MOSFET (b) 7400 (c) quad (d) AC00
    Tags: logic, families, ttl, electronics, engineering
  • Logic Gates - 1675555555555167. Which of the symbols shown below represents an AND gate? (a) a (b) b (c) c (d) d
    Tags: logic, electronics, engineering

LEAVE A REPLY

Please enter your comment!
Please enter your name here