Frequency Domain Analysis » Exercise – 1
14. Large values of gain margin and phase margin result in :
(a) a fast system
(b) an unstable system
(c) a sluggish system
(d) an underdamped systemSubject Name : Electronics Engineering Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant Electronics & Communication Engineering Books
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