5555555555
102. VHDL is very strict in the way it allows us to assign and compare ________ such as signals, variables, constants, and literals.
(a) objects
(b) LOGIC_VECTORS
(c) designs
(d) arrays
Subject Name : Electronics Engineering |
Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT |
Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant |
Electronics & Communication Engineering Books |
GATE 2023 Total Info | ENGG DIPLOMA | UGC NET Total Info |
IES 2023 Total Info | PSUs 2022 Total Info | CSIR UGC NET Total Info |
JAM 2023 Total Info | M TECH 2023 Total Info | RAILWAY 2022 Total Info |