5555555555
99. The output stage of a TTL gate is a special design called ________.
(a) multiemitter
(b) totem-pole
(c) MSI
(d) DIP
Explanation
Explanation : No answer description available for this question. Let us discuss.
Subject Name : Electronics Engineering Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT
Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant
Electronics & Communication Engineering Books
Related Posts 555555555538. The output of this circuit is always ________. (a) 1 (b) 0 (c) A (d) A Tags: logic, output, electronics, engineering
555555555528. How many 74LSTTL logic gates can be driven from a 74TTL gate? (a) 10 (b) 20 (c) 200 (d) 400 Tags: logic, families, ttl, gate, electronics, engineering
555555555563. The output of an OR gate with three inputs, A, B, and C, is LOW when ________. (a) A = 0, B = 0, C = 0 (b) A = 0, B = 0, C = 1 (c) A = 0, B = 1, C = 1 (d) all of the above Tags: logic, output, gate, electronics, engineering
555555555539. The output of this circuit is always ________. (a) 1 (b) 0 (c) A (d) A Tags: logic, output, electronics, engineering
5555555555104. The HIGH logic level for a standard TTL output must be at least ________. (a) 2.4 V (b) 2 V (c) 0.8 V (d) 5 V Tags: logic, families, ttl, output, electronics, engineering