77. A certain common-source JFET has a voltage gain of 10. If the source bypass capacitor is removed, ………………….
(a) the voltage gain will increase
(b) the transconductance will increase
(c) the voltage gain will decrease
(d) the Q-point will shiftSubject Name : Electronics Engineering Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant Electronics & Communication Engineering Books
GATE 2023 Total Info ENGG DIPLOMA UGC NET Total Info IES 2023 Total Info PSUs 2022 Total Info CSIR UGC NET Total Info JAM 2023 Total Info M TECH 2023 Total Info RAILWAY 2022 Total Info
Related Posts
FET » Exercise - 279. If load resistance in Q. 78 is removed, the output voltage will ............... (a) increase (b) decrease (c) stay the same (d) be zero- FET » Exercise - 262. The pinch-off voltage of a JFET is about ....... (a) 5 V (b) 0.6 V (c) 15 V (d) 25 V
- FET » Exercise - 281. When the positive on the gate of a P-channel JFET is increased, the drain current will : (a) Increase (b) Decrease (c) Remain same (d) Any of the above
- FET » Exercise - 149. A JFET has ....... power gain. (a) small (b) very high (c) very small (d) none of the above
- 555555555569. In an emitter-follower, the voltage gain is ________. (a) slightly less than 1 (b) slightly more than 1 (c) a very large value (d) None of the above