41. An 8-bit serial in/serial out shift register is used with a clock frequency of 150 kHz. What is the time delay between the serial input and the Q3 output?
(a) 1.67 s
(b) 26.67 s
(c) 26.7 ms
(d) 267 ms
42. A modulus-12 ring counter requires a minimum of ________.
(a) 10 flip-flops
(b) 12 flip-flops
(c) 6 flip-flops
(d) 2 flip-flops
43. What is meant by parallel load of a shift register?
(a) All FFs are preset with data.
(b) Each FF is loaded with data, one
(c)
(d)
44. How many clock pulses will be required to completely load serially a 5-bit shift register?
(a) 2
(b) 3
(c) 4
(d) 5
45. Which type of device may be used to interface a parallel data format with external equipment’s serial format?
(a) key matrix
(b) UART
(c) memory chip
(d) series in, parallel out
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