Programmable Logic Devices – Exercise – 1

16. Most look-up tables in field-programmable gate arrays (FGPAs) use ________ inputs, resulting in ________ possible outputs.

(a) 4,16
(b) 8,16
(c) 4,12
(d) 6,12

Answer
Answer : (a)
Explanation
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17. A circuit that implements a combinational logic function by storing a list of output values that correspond to all possible input combinations is a(n) ________.

(a) output logic macrocell
(b) look-up table
(c) parallel logic expander
(d) logic element

Answer
Answer : (b)
Explanation
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18. Each programmable array logic (PAL) gate product is applied to an OR gate and, if combinational logic is desired, the product is ORed and then:

(a) the polarity fuse is restored
(b) sent to an inverter for output
(c) sent immediately to an output pin
(d) passed to the AND function for output

Answer
Answer : (b)
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19. The complex programmable logic device (CPLD) features a(n) ________ type of memory.

(a) volatile
(b) nonvolatile
(c) EPROM
(d) volitile EPROM

Answer
Answer : (b)
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20. The complex programmable logic device (CPLD) contains several PAL-type simple programmable logic devices (SPLDs) called:

(a) macrocells
(b) microcells
(c) AND/OR arrays
(d) fuse-link arrays

Answer
Answer : (a)
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