Memory Devices – Exercise – 2

66. Which of the following is normally used to initialize a computer system’s hardware?

(a) Bootstrap memory
(b) Volatile memory
(c) External mass memory
(d) Static memory

Answer
Answer : (a)
Explanation
Explanation : No answer description available for this question. Let us discuss.
Discuss
Discuss : Write your answer. Click here.

67. ROM access time is defined as ________.

(a) how long it takes to program the ROM chip
(b) being the difference between the READ and WRITE times
(c) the time it takes to get valid output data after a valid address is applied
(d) the time required to activate the address lines after the ENABLE line is at a valid level

Answer
Answer : (c)
Explanation
Explanation : No answer description available for this question. Let us discuss.
Discuss
Discuss : Write your answer. Click here.

68. The checkerboard pattern test is used to test ________.

(a) ROM
(b) EEPROM
(c) FPLA
(d) RAM

Answer
Answer : (d)
Explanation
Explanation : No answer description available for this question. Let us discuss.
Discuss
Discuss : Write your answer. Click here.

69. Information that is stored in an EEPROM ________.

(a) can be modified by performing a memory write operation
(b) is stored by the manufacturer and cannot be changed
(c) is lost if power is interrupted
(d) can be erased by applying high voltage to each storage location

Answer
Answer : (d)
Explanation
Explanation : No answer description available for this question. Let us discuss.
Discuss
Discuss : Write your answer. Click here.

70. The TMS44100 has ________ address inputs.

(a) 10
(b) 11
(c) 12
(d) 13

Answer
Answer : (b)
Explanation
Explanation : No answer description available for this question. Let us discuss.
Discuss
Discuss : Write your answer. Click here.

Related Posts

  • Memory Devices - Exercise - 4151. Because 4096 = 212, a 4K × 1 RAM requires ________ address bits to access all locations. (a) 4096 (b) 10 (c) 12 (d) 1024 152. The checksum method is used to test ________. (a) ROM (b) EEPROM (c) FPLA (d) RAM 153. A FIFO ________. (a) allows data to be clocked in and out at different clock rates (b) outputs the data in the same order that it was input (c) can be used to smooth out bursts of data into a continuous stream (d) All of the above 154. The major advantage of dynamic RAM over static RAM is ________. (a) cost (b) speed (c) storage density (d) cost and storage density 155. Dynamic RAMs store information by using ________. (a) magnetism (b) flip-flops (c) latches (d) capacitors 156. The memory operation that stores data into a memory location after entering a new address is called ________. (a) a read cycle (b) a write cycle (c) a refresh cycle (d) chip select 157. The memory operation that presents data on the memory outputs after entering a new address is called ________. (a) a read cycle (b) a write cycle (c) a refresh cycle (d) a chip select…
    Tags: memory, data, address, ram, mcq, series
  • Memory Devices - Exercise - 3101. Which type of ROM can be erased by UV light? (a) ROM (b) mask ROM (c) EPROM (d) EEPROM 102. Which type of ROM can be erased by an electrical signal? (a) ROM (b) mask ROM (c) EPROM (d) EEPROM 103. In general, the ________ have the smallest bit size and the ________ have the largest. (a) EEPROMs, Flash (b) SRAM, mask ROM (c) mask ROM, SRAM (d) DRAM, PROM 104. Which type of ROM has to be custom built by the factory? (a) ROM (b) mask ROM (c) EPROM (d) EEPROM 105. What part of a Flash memory architecture manages all chip functions? (a) I/O pins (b) floating-gate MOSFET (c) command code (d) program verify code 106. Why do most dynamic RAMs use a multiplexed address bus? (a) It is the only way to do it. (b) to make it faster (c) to keep the nu (d) 107. What is a multitap digital delay line? (a) a series of inverter gates with RC circuits between each one (b) a series of inverter gates with RL circuits between each one (c) a series of NAND gates with RC circuits between each one (d) a series of NAND gates with…
    Tags: memory, rom, data, address, ram, mcq, series
  • IO and Memory Interfacing - Mcqs/Notes/IQsHome » Electronics Engineering » Microprocessors and Microcontrollers » IO and Memory Interfacing
    Tags: memory, mcq, series
  • Memory Devices - Mcqs/Notes/IQsHome » Electronics Engineering » Digital Electronics » Memory Devices
    Tags: memory, mcq, series
  • Data Structures - Mcqs/Notes/IQsHome » Computer Science » Data Structures
    Tags: data, mcq, series

LEAVE A REPLY

Please enter your comment!
Please enter your name here