46. Select the statement that best describes the parity method of error detection:
(a) Parity checking is best suited for detecting double-bit that occur during the transmission of codes from one location to another.
(b) Parity checking is not suitable for detecting single-bit in transmitted codes.
(c) Parity checking is best suited for detecting single-bit in transmitted codes.
(d) Parity checking is capable of detecting and correcting in transmitted codes.
47. A logic circuit that provides a HIGH output for both inputs HIGH or both inputs LOW is a(n):
(a) Ex-NOR gate
(b) OR gate
(c) Ex-OR gate
(d) NAND gate
48. A logic circuit that provides a HIGH output if one input or the other input, but not both, is HIGH, is a(n):
(a) Ex-NOR gate
(b) OR gate
(c) Ex-OR gate
(d) NAND gate
49. Identify the type of gate below from the equation
(a) Ex-NOR gate
(b) OR gate
(c) Ex-OR gate
(d) NAND gate
50. Determine odd parity for each of the following data words: 1011101111101111001101
(a) P = 1, P = 1, P = 0
(b) P = 0, P = 0, P = 0
(c) P = 1, P = 1, P = 1
(d) P = 0, P = 0, P = 1
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