71. What must be done to interface CMOS to TTL?
(a) A dropping resistor must be used on the CMOS 12 V supply to reduce it to 5 V for the TTL.
(b) As long as the CMOS supply voltage is 5 V, they can be interfaced; however, the fan-out of the CMOS is limited to two TTL gates.
(c) A 5 V Zener diode must be placed across the inputs of the TTL gates in order to protect them from the higher output voltages of the CMOS gates.
(d) The two series cannot be interfaced without the use of special interface buffers designed for that purpose, such as the open-collector buffers.
72. Which of the following logic families has the highest noise margin?
(a) TTL
(b) LS TTL
(c) CMOS
(d) HCMOS
73. Which of the following statements apply to CMOS devices?
(a) The devices should not be inserted into circuits with the power on.
(b) All tools, test equipment, and metal workbenches should be tied to earth ground.
(c) The devices should be stored and shipped in antistatic tubes or conductive foam.
(d) All of the above.
74. What type of circuit is shown below and which statement best describes its operation?
(a) It is a two-input CMOS AND gate with open drain.
(b) It is a two-input CMOS buffer with tristate output.
(c) It is a CMOS inverter with tristate output.
(d) It is a hybrid TTL-CMOS inverter with FET totem-pole output.
75. What type of logic circuit is shown below and what logic function is being performed?
(a) It is an NMOS AND gate.
(b) It is a CMOS AND gate.
(c) It is a CMOS NOR gate.
(d) It is a PMOS NAND gate.
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