Counters – Exercise – 1

31. A 4-bit ripple counter consists of flip-flops, which each have a propagation delay from clock to Q output of 15 ns. For the counter to recycle from 1111 to 0000, it takes a total of ________.

(a) 15 ns
(b) 30 ns
(c) 45 ns
(d) 60 ns

Answer
Answer : (d)
Explanation
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32. Three cascaded decade counters will divide the input frequency by ________.

(a) 10
(b) 20
(c) 100
(d) 1,000

Answer
Answer : (d)
Explanation
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33. An asynchronous 4-bit binary down counter changes from count 2 to count 3. How many transitional states are required?

(a) None
(b) One
(c) Two
(d) Fifteen

Answer
Answer : (d)
Explanation
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34. The hexadecimal equivalent of 15,536 is ________.

(a) 3CB0
(b) 3C66
(c) 63C0
(d) 6300

Answer
Answer : (a)
Explanation
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35. The final output of a modulus-8 counter occurs one time for every ________.

(a) 8 clock pulses
(b) 16 clock pulses
(c) 24 clock pulses
(d) 32 clock pulses

Answer
Answer : (a)
Explanation
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