21. Which of the following is an invalid state in an 8421 BCD counter?
(a) 0011
(b) 1001
(c) 1000
(d) 1100
22. How many different states does a 2-bit asynchronous counter have?
(a) 1
(b) 2
(c) 4
(d) 8
23. The designation means that the ________.
(a) up count is active-HIGH, the down count is active-LOW
(b) up count is active-LOW, the down count is active-HIGH
(c) up and down counts are both active-LOW
(d) up and down counts are both active-HIGH
24. A 12 MHz clock frequency is applied to a cascaded counter containing a modulus-5 counter, a modulus-8 counter, and a modulus-10 counter. The lowest output frequency possible is ________.
(a) 10 kHz
(b) 20 kHz
(c) 30 kHz
(d) 60 kHz
25. Three cascaded modulus-5 counters have an overall modulus of ________.
(a) 5
(b) 25
(c) 125
(d) 500
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