77. Select the response that best describes the use of the Master Reset on typical 4-bit binary counters.
(a) When MR1 and MR2 are both HIGH, all Qs will be reset to zero.
(b) When MR1 and MR2 are both HIGH, all Qs will be reset to one.
(c) MR1 and MR2 are provided to synchronously reset all four flip-flops.
(d) To enable the count mode, MR1 and MR2 must be held LOW.
Subject Name : Electronics Engineering |
Exam Name : IIT GATE, UPSC ESE, RRB, SSC, DMRC, NMRC, BSNL, DRDO, ISRO, BARC, NIELIT |
Posts Name : Assistant Engineer, Management Trainee, Junior Engineer, Technical Assistant |
Electronics & Communication Engineering Books
|
GATE 2023 Total Info | ENGG DIPLOMA | UGC NET Total Info |
IES 2023 Total Info | PSUs 2022 Total Info | CSIR UGC NET Total Info |
JAM 2023 Total Info | M TECH 2023 Total Info | RAILWAY 2022 Total Info |