Interrupts of 8085 Microprocessor – Exercise – 1

Interrupts of 8085 Microprocessor » Exercise – 1

1. An interrupt which can be temporarily ignored by the counter is known as :

(a) Vectored interrupt
(b) Non maskable interrupt
(c) Maskable interrupt
(d) Low priority interrupt

2. An interrupt which can be temporarily ignored by the counter is known as :

(a) Vectored interrupt
(b) Non maskable interrupt
(c) Maskable interrupt
(d) Low priority interrupt

3. An interrupt in which the external device supplies its address as well as the interrupt request is known as :

(a) Vectored interrupt
(b) Non maskable interrupt
(c) Maskable interrupt
(d) Designated interrupt

4. In 8085, interrupts except TRAP are disabled by (incorrect) :

(a) A DI instruction
(b) A system reset
(c) Acknowledgement of a previous interrupt
(d) None of the above

5. When a CPU is interrupted, it :

(a) Stops execution of instruction
(b) Acknowledges interrupt and continues
(c) Acknowledges interrupt and branches to a subroutine
(d) None of the above

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