Instruction Timing Diagram of 8085 Microprocessor – Exercise – 1

Instruction Timing Diagram of 8085 Microprocessor » Exercise – 1

1. An instruction cycle is made up of :

(a) One or more execute cycles
(b) One or more fetch cycles
(c) One opcode and one fetch cycle
(d) None of the above

2. The no. of minimum clock cycle in a m/c cycle for 8085 are :

(a) 1
(b) 2
(c) 3
(d) 5

3. In a 8 bit mp, the fetch cycle required to fetch a 8 bit instruction will be :

(a) 1
(b) 2
(c) 3
(d) Depends on the computer design

4. Which of the following cycles are required to fetch and execute information :

(a) Clock cycles
(b) T cycles
(c) Instruction cycle
(d) Memory cycle

5. Normally a MP cycles b/w :

(a) Fetch and halt states
(b) Fetch and interrupt states
(c) Fetch and execute states
(d) Halt and execute states

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