FET – 1 – 3

11. The input impedance of FET :

(a) Is less than 10 kΩ
(b) Is greater than 10 MΩ
(c) Falls within a range between 10 kΩ and 10 MΩ
(d) Is less than 1 kΩ

12. With reference to JFET configuration, match the following
(P) Common Source Configuration         (1) No phase shift between input & output
(Q) Common Drain Configuration           (2) High input impedance & low output impedance
(R) Common Gate Configuration             (3) Source follower Configuration

(a) P-1, Q-2, R-3
(b) P-2, Q-3, R-1
(c) P-2, Q-1, R-3
(d) P-3, Q-1, R-2

13. Conduction modulation is exhibited by :

(a) Transistor
(b) Diode
(c) JFET
(d) Tunnel diode

14. Junction gate type of FET can be operated :

(a) Only in depletion mode
(b) Only in enhancement mode
(c) Both depletion & enhancement modes
(d) Either depletion or enhancement mode

15. The constant current area of FET lies between :

(a) 0 & IDSS
(b) Cut off & Pinch off regions
(c) Cut off & Saturation regions
(d) Pinch-off & break-down regions

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